Beware Academia, Walloon region

Summary

The main objective of the project is the development of the prototype of a new toolchain module able to generate parallel, analysable, multicore code starting from a high-level language.

Team

• Promotor
  • Joël Goossens (ULB)

• Industrial mentors

  • Ben Rodriguez (Hipperos)
  • Christian Lemer (Hipperos)

• Researcher

  • Juan M. Rivas

Programme Tournesol (WBI & FNRS)

Résumé

Le projet porte sur la conception de systèmes informatiques temps réel critiques, la théorie de l'ordonnancement temps réel en particulier. Le projet comporte trois volets : (i) contribuer au problème ouvert du « Dual Priority » afin de définir un ordonnanceur optimal à priorités fixes à moindre coût; (ii) étendre la théorie de l'ordonnancement pour permettre, lors de la certification d'un système, de modéliser et prendre en compte les réels coût de l'exécutif (RTOS, le système d'exploitation) et (iii) étendre la théorie de l'ordonnancement aux plates-formes parallèles c'est-à-dire multi-cœurs, cette extension devra comprendre une théorie de l'ordonnancement robuste, non sujette à des anomalies d'ordonnancement, ainsi qu'une prise en compte des coûts de préemption et de migration des tâches.

Summary

The project OCTET aims to contribute to an important open question in the field of Real-time Systems: Optimality of the Dual Priority Scheme. We would like to contribute to that question and also to define more deterministic scheduler with overhead condisiderations (preemption and migration).

Équipe/Team

• Promoteurs

  • Joël Goossens (ULB)
  • Laurent George (Paris-Est)

• Chercheurs

  • Damien Masson (Paris-Est)
  • Paul Rodriguez (ULB)

Project ARC (Concerted Research Action, Fédération Wallonie-Bruxelles)

Project Summary

Over the last 50 years, the CMOS technology allowed more and more efficient manufacturing of integrated circuits. This technology has now reached not only the physical limits, but also important economic barriers! Even if we are ready to produce integrated circuits with minimum features size below 10 nanometers, the production cost is high and will significantly increase with the following technology generations.

To overcome this problem, a computer system paradigm shift is needed: let us imagine complex systems such as a computers, watches, biomedical implants, the controls of an aircraft, or any other system, made entirely from the same elementary integrated circuits, combined at design time, during integrated circuit packaging. All we have to do is to make them communicate securely and to schedule them properly in order to realize complex and as varied architectures as necessary.

The Concerted Research Action “SOFIST" proposes to develop these future IT architectures called "CLOUD-OF-CHIPS". By combining researches on integrated circuit design, communication, security and scheduling, these new kind of circuits could replace any computer system! The valorization perspectives are important because the outcomes of this research will be applicable for embedded systems, real-time systems, communication systems, etc. as well as for mainstream systems such as Internet-of-Things and Internet-of-Everything.

Team

• Promotors
  • Dragomir Milojevic
  • Joël Goossens
  • Olivier Markowitch
  • Jean-Michel Dricot
  • François Quitin
• Researchers
  • Xavier Poczekajlo
  • Gaurav Sharma
  • George Bousdras
  • Soultana Ellinidou

Objective

Federate researchers working on the fundamental and applied aspects of real time systems.

The applications include: avionics, the automobile industry, robotics, in-car systems.

Contact

• Joël Goossens (Chair)
• Pierre Manneback, FPMS, Mons (Secretary)

Projet de Recherche (PDR) FNRS

Project Summary

The main goal of this project is to advance the current knowledge on multiprocessor real-time scheduling, in particular, by defining efficient, sound and complete algorithms for typical problems (such as schedulability and online feasibility problems on multiprocessor platforms). These problems are particularly hard in the multiprocessor case, as the worst-case scenario is still unknown (contrary to the uniprocessor case). In order to obtain efficient algorithms that are applicable in practice, the project will rely on techniques and heuristics that have been developed in the field of formal verification. Thus, a secondary goal of the project if to demonstrate the applicability of specific techniques that have been developed in the setting of formal verification, to multiprocessor scheduling problems. There are strong links between these two rather separate fields, and we see there a unique opportunity for cross-fertilisation of these two domains of fundamental computer science.

Team

• Promotors
  • Gilles Geeraerts
  • Joël Goossens
• Postdoc
  • Van-Anh NGUYEN